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LTC1799 1kHz to 33MHz Resistor Set SOT-23 Oscillator
FEATURES
s s s s s
DESCRIPTIO
s
s s s s s s s
One External Resistor Sets the Frequency Fast Start-Up Time: < 1ms 1kHz to 33MHz Frequency Range Low Profile (1mm) ThinSOTTM Package Frequency Error 1.5% 5kHz to 20MHz (TA = 25C) Frequency Error 2% 5kHz to 20MHz (TA = 0C to 70C) 40ppm/C Temperature Stability 0.05%/V Supply Stability 50% 1% Duty Cycle 1kHz to 2MHz 50% 5% Duty Cycle 2MHz to 20MHz 1mA Typical Supply Current 100 CMOS Output Driver Operates from a Single 2.7V to 5.5V Supply
The LTC(R)1799 is a precision oscillator that is easy to use and occupies very little PC board space. The oscillator frequency is programmed by a single external resistor (RSET). The LTC1799 has been designed for high accuracy operation (1.5% frequency error) without the need for external trim components. The LTC1799 operates with a single 2.7V to 5.5V power supply and provides a rail-to-rail, 50% duty cycle square wave output. The CMOS output driver ensures fast rise/fall times and rail-to-rail switching. The frequency-setting resistor can vary from 3k to 1M to select a master oscillator frequency between 100kHz and 33MHz (5V supply). The three-state DIV input determines whether the master clock is divided by 1, 10 or 100 before driving the output, providing three frequency ranges spanning 1kHz to 33MHz (5V supply). The LTC1799 features a proprietary feedback loop that linearizes the relationship between RSET and frequency, eliminating the need for tables to calculate frequency. The oscillator can be easily programmed using the simple formula outlined below:
100, DIV Pin = V + 10k fOSC = 10MHz * , N = 10, DIV Pin = Open N * RSET 1, DIV Pin = GND
APPLICATIO S
s s s s s s s
Low Cost Precision Oscillator Charge Pump Driver Switching Power Supply Clock Reference Clocking Switched Capacitor Filters Fixed Crystal Oscillator Replacement Ceramic Oscillator Replacement Small Footprint Replacement for Econ Oscillators
, LTC and LT are registered trademarks of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.
TYPICAL APPLICATIO
Typical Distribution of Frequency Error, TA = 25C (5kHz fOSC 20MHz, V + = 5V)
25
Basic Connection
5V 0.1F 3k RSET 1M 1 2 3 1kHz fOSC 33MHz 5 5V 4 /100 /1 /10 UNITS (%) 20
V+ OUT LTC1799 GND SET DIV
1799 TA01
15
10
OPEN 5
SOT-23 Actual Size
0 -1.25
-0.75 -0.25 0 0.25 0.75 FREQUENCY ERROR (%)
U
1.25
1799 TA02
U
U
1
LTC1799
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW V+ 1 GND 2 SET 3 4 DIV 5 OUT
Supply Voltage (V +) to GND ........................- 0.3V to 6V DIV to GND .................................... - 0.3V to (V + + 0.3V) SET to GND ................................... - 0.3V to (V + + 0.3V) Operating Temperature Range LTC1799C ............................................... 0C to 70C LTC1799I ............................................ - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
ORDER PART NUMBER LTC1799CS5 LTC1799IS5 S5 PART MARKING LTND LTNE
S5 PACKAGE 5-LEAD PLASTIC SOT-23
TJMAX = 125C, JA = 256C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL f PARAMETER Frequency Accuracy
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 2.7V to 5.5V, RL=5k, CL = 5pF, unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V+ = 5V 5kHz f 20MHz 5kHz f 20MHz, LTC1799C 5kHz f 20MHz, LTC1799I 1kHz f 5kHz 20MHz f 33MHz 5kHz f 10MHz 5kHz f 10MHz, LTC1799C 5kHz f 10MHz, LTC1799I 1kHz f 5kHz 10MHz f 20MHz V + = 5V V + = 3V V + = 5V V + = 3V
q q q q
MIN
TYP 0.5 2.5 2.5 0.5
MAX 1.5 2 2.5
UNITS % % % % % % % % % % k k MHz MHz kHz %/C
(Notes 2, 3) V+ = 3V
q q
2.5 2.5 5 10 33 20 1 0.004 0.05 0.06 0.13 0.4 300
q q q
1.5 2 2.5
RSET fMAX fMIN f/T f/V
Frequency-Setting Resistor Range Maximum Frequency Minimum Frequency Freq Drift Over Temp (Note 3) Freq Drift Over Supply (Note 3) Timing Jitter (Note 4) Long-Term Stability of Output Frequency Duty Cycle (Note 7)
f < 1.5% f < 2.5%, Pin 4= 0V f < 2.5%, Pin 4= V +
200 200
RSET = 31.6k V+ = 3V to 5V, RSET = 31.6k Pin 4 = V + Pin 4 = Open Pin 4 = 0V Pin 4 = V + or Open (DIV Either by 100 or 10) Pin 4 = 0V (DIV by 1), RSET = 5k to 200k RSET = 200k, Pin 4 = V +, RL = RSET = 10k, Pin 4 = 0V, RL = V + = 5V V + = 5V V + = 3V
0.1
ppm/kHr 51 55 5.5 1.1 2.4 2 0.5 % % V mA mA mA V V A A
49 45 2.7
50 50 0.7
V+ IS
Operating Supply Range Power Supply Current
q q q q V+ - 0.4 q
VIH VIL IDIV
High Level DIV Input Voltage Low Level DIV Input Voltage DIV Input Current (Note 5) Pin 4 = V + Pin 4 = 0V V + = 5V V + = 5V
q q
-8
5 -5
8
2
U
%/V % % %
W
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U
WW
W
LTC1799
ELECTRICAL CHARACTERISTICS
SYMBOL VOH PARAMETER High Level Output Voltage (Note 5)
The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. V+ = 2.7V to 5.5V, RL=5k, CL = 5pF, Pin 4 = V+ unless otherwise noted. All voltages are with respect to GND.
CONDITIONS V + = 5V V + = 3V VOL Low Level Output Voltage (Note 5) V + = 5V V + = 3V tr OUT Rise Time (Note 6) V + = 5V V + = 3V tf OUT Fall Time (Note 6) V + = 5V V + = 3V IOH = - 1mA IOH = - 4mA IOH = - 1mA IOH = - 4mA IOL = 1mA IOL = 4mA IOL = 1mA IOL = 4mA Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL = Pin 4 = V+ or Floating, RL = Pin 4 = 0V, RL =
q q q q q q q q
MIN 4.8 4.5 2.7 2.2
TYP 4.95 4.8 2.9 2.6 0.05 0.2 0.1 0.4 14 7 19 11 13 6 19 10
MAX
UNITS V V V V
0.15 0.4 0.3 0.7
V V V V ns ns ns ns ns ns ns ns
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: Frequencies near 100kHz and 1MHz may be generated using two different values of RSET (see the Table 1 in the Applications Information section). For these frequencies, the error is specified under the following assumption: 10k < RSET 100k. The frequency accuracy for fOSC = 20MHz is guaranteed by design and test correlation. Note 3: Frequency accuracy is defined as the deviation from the fOSC equation.
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. This specification is based on characterization and is not 100% tested. Note 5: To conform with the Logic IC Standard convention, current out of a pin is arbitrarily given as a negative value. Note 6: Output rise and fall times are measured between the 10% and 90% power supply levels. These specifications are based on characterization. Note 7: Guaranteed by 5V test.
3
LTC1799 TYPICAL PERFOR A CE CHARACTERISTICS
Frequency Variation vs RSET
4 3 2
VARIATION (%)
TA = 25C GUARANTEED LIMITS APPLY OVER 5k TO 200k RANGE TYPICAL HIGH
1 0 -1 -2 -3 -4 1 10
VARIATION (%)
Peak-to-Peak Jitter vs Frequency
0.7 0.6 0.5 JITTER (%) 0.4 0.3 0.2 /100 0.1 0 1k 100k 1M 10M 10k OUTPUT FREQUENCY, fOUT (Hz) 100M
1799 G03
SUPPLY CURRENT (mA)
/10
Output Resistance vs Supply Voltage
140 TA = 25C
OUTPUT RESISTANCE ()
120 OUTPUT SOURCING CURRENT 100
80
60 OUTPUT SINKING CURRENT 40 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGE (V) 5.5 6.0
4
UW
1799 G05
Frequency Variation Over Temperature
1.00 0.75 0.50 0.25 0 -0.25 -0.50 -0.75 TYPICAL LOW TYPICAL HIGH RSET = 31.6k /1 OR /10 OR /100
TYPICAL LOW
100 RSET (k)
1000
1799 G01
-1.00 -40
-20
40 20 60 0 TEMPERATURE (C)
80
1799 G02
Supply Current vs Output Frequency
4.5 4.0 TA = 25C CL = 5pF RL = 1M
/1
3.5 3.0 2.5 2.0 1.5 1.0 0.5 0
/1 (5V) /10 (5V) /100 (5V)
/100 (3V) 1k
/10 (3V)
/1 (3V) 100M
1799 G04
10k 100k 1M 10M OUTPUT FREQUENCY, fOUT (Hz)
LTC1799 Output Operating at 20MHz, VS = 5V
V + = 5V, RSET = 5k, CL = 10pF
LTC1799 Output Operating at 10MHz, VS = 3V
V + = 3V, RSET = 10k, CL = 10pF
1V/DIV
1V/DIV
12.5ns/DIV
1799 G06
25ns/DIV
1799 G07
LTC1799
PI FU CTIO S
V+ (Pin 1): Voltage Supply (2.7V V+ 5.5V). This supply must be kept free from noise and ripple. It should be bypassed directly to a ground plane with a 0.1F capacitor. GND (Pin 2): Ground. Should be tied to a ground plane for best performance. SET (Pin 3): Frequency-Setting Resistor Input. The value of the resistor connected between this pin and V+ determines the oscillator frequency. The voltage on this pin is held by the LTC1799 to approximately 1.13V below the V+ voltage. For best performance, use a precision metal film resistor with a value between 10k and 200k and limit the capacitance on this pin to less than 10pF. DIV (Pin 4): Divider-Setting Input. This three-state input selects among three divider settings, determining the value of N in the frequency equation. Pin 4 should be tied to GND for the /1 setting, the highest frequency range. Floating Pin 4 divides the master oscillator by 10. Pin 4 should be tied to V+ for the /100 setting, the lowest frequency range. To detect a floating DIV pin, the LTC1799 attempts to pull the pin toward midsupply. This is realized with two internal current sources, one tied to V + and Pin 4 and the other one tied to ground and Pin 4. Therefore, driving the DIV pin high requires sourcing approximately 5A. Likewise, driving DIV low requires sinking 5A. When Pin 4 is floated, preferably it should be bypassed by a 1nF capacitor to ground or it should be surrounded by a ground shield to prevent excessive coupling from other PCB traces. OUT (Pin 5): Oscillator Output. This pin can drive 5k and/or 10pF loads. Larger loads may cause inaccuracies due to supply bounce at high frequencies. Transients will not cause latchup if the current into/out of the OUT pin is limited to 50mA.
BLOCK DIAGRA
1 RSET IRES 3
V+
SET
+ -
2 GND
W
U
U
U
VRES = 1.13V 25% (V+ - VSET)
+
GAIN = 1 MASTER OSCILLATOR MO = 100MHz * k * IRES (V + - VSET)
PROGRAMMABLE DIVIDER (/1, 10 OR 100) V+ DIVIDER SELECT
OUT
5
-
VBIAS
5A
IRES
THREE-STATE INPUT DETECT
DIV
4
5A GND
1799 BD
5
LTC1799
THEORY OF OPERATIO
As shown in the Block Diagram, the LTC1799's master oscillator is controlled by the ratio of the voltage between the V+ and SET pins and the current entering the SET pin (IRES). The voltage on the SET pin is forced to approximately 1.13V below V+ by the PMOS transistor and its gate bias voltage. This voltage is accurate to 7% at a particular input current and supply voltage (see Figure 1). The effective input resistance is approximately 2k. A resistor RSET, connected between the V+ and SET pins, "locks together" the voltage (V + - VSET) and current, IRES, variation. This provides the LTC1799's high precision. The master oscillation frequency reduces to:
10k MO = 10MHz * RSET
The LTC1799 is optimized for use with resistors between 10k and 200k, corresponding to master oscillator frequencies between 0.5MHz and 10MHz. Accurate frequencies up to 20MHz (RSET = 5k) are attainable if the supply voltage is greater than 4V. To extend the output frequency range, the master oscillator signal may be divided by 1, 10 or 100 before driving
1.4 1.3 V + = 5V VRES = V + - VSET 1.2 V + = 3V 1.1 1.0 0.9 0.8 1 10 IRES (A)
1799 F01
TA = 25C
RSET (k)
100
Figure 1. V + - VSET Variation with IRES
6
U
OUT (Pin 5). The divide-by value is determined by the state of the DIV input (Pin 4). Tie DIV to GND or drive it below 0.5V to select /1. This is the highest frequency range, with the master output frequency passed directly to OUT. The DIV pin may be floated or driven to midsupply to select /10, the intermediate frequency range. The lowest frequency range, /100, is selected by tying DIV to V+ or driving it to within 0.4V of V+. Figure 2 shows the relationship between RSET, divider setting and output frequency, including the overlapping frequency ranges near 100kHz and 1MHz. The CMOS output driver has an on resistance that is typically less than 100. In the /1 (high frequency) mode, the rise and fall times are typically 7ns with a 5V supply and 11ns with a 3V supply. These times maintain a clean square wave at 10MHz (20MHz at 5V supply). In the /10 and /100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver increases the rise/fall times to typically 14ns for a 5V supply and 19ns for a 3V supply. The reduced slew rate lowers EMI (electromagnetic interference) and supply bounce.
1000 100 /100 /10 /1 MOST ACCURATE OPERATION 10
1000
1 1k 10k 100k 1M 10M DESIRED OUTPUT FREQUENCY (Hz) 100M
1799 F02
Figure 2. RSET vs Desired Output Frequency
LTC1799
APPLICATIO S I FOR ATIO
SELECTING THE DIVIDER SETTING AND RESISTOR The LTC1799's master oscillator has a frequency range spanning 0.1MHz to 33MHz. However, accuracy may suffer if the master oscillator is operated at greater than 10MHz with a supply voltage lower than 4V. A programmable divider extends the frequency range to greater than three decades. Table 1 describes the recommended frequencies for each divider setting. Note that the ranges overlap; at some frequencies there are two divider/resistor combinations that result in the desired frequency. In general, any given oscillator frequency (fOSC) should be obtained using the lowest master oscillator frequency. Lower master oscillator frequencies use less power and are more accurate. For instance, fOSC = 100kHz can be obtained by either RSET = 10k, N = 100, master oscillator = 10MHz or RSET = 100k, N = 10, master oscillator = 1MHz. The RSET = 100k is preferred for lower power and better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTING /1 /10 DIV (Pin 4) = GND DIV (Pin 4) = Floating DIV (Pin 4) = V+ FREQUENCY RANGE > 500kHz* 50kHz to 1MHz < 100kHz
/100
*At master oscillator frequencies greater than 10MHz (R SET
< 10k), the LTC1799 may suffer reduced accuracy with a supply voltage less than 4V.
After choosing the proper divider setting, determine the correct frequency-setting resistor. Because of the linear correspondence between oscillation period and resistance, a simple equation relates resistance with frequency. 100 10MHz RSET = 10k * , N = 10 N * fOSC 1 (RSETMIN = 3k (5V Supply), 5k (3V Supply), RSETMAX = 1M) Any resistor, RSET, tolerance adds to the inaccuracy of the oscillator, fOSC.
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ALTERNATIVE METHODS OF SETTING THE OUTPUT FREQUENCY OF THE LTC1799 The oscillator may be programmed by any method that sources a current into the SET pin (Pin 3). The circuit in Figure 3 sets the oscillator frequency using a programmable current source and in the expression for fOSC, the resistor RSET is replaced by the ratio of 1.13V/ICONTROL. As already explained in the "Theory of Operation," the voltage difference between V + and SET is approximately 1.13V, therefore, the Figure 3 circuit is less accurate than if a resistor controls the oscillator frequency. Figure 4 shows the LTC1799 configured as a VCO. A voltage source is connected in series with an external 10k resistor. The output frequency, fOSC, will vary with VCONTROL, that is the voltage source connected between V + and the SET pin. Again, this circuit decouples the relationship between the input current and the voltage between V + and SET; the frequency accuracy will be degraded. The oscillator frequency, however, will monotonically increase with decreasing VCONTROL.
+
W
UU
400kHz TO 21MHz (APPROXIMATE, SEE TEXT) 1 0.1F 2 3 OUT V+ LTC1799 GND SET DIV
1799 F03
V
5
ICONTROL 5A TO 200A
4
N=1
OSC 10MHz * 10k * ICONTROL N 1.13V ICONTROL EXPRESSED IN (A)
Figure 3. Current Controlled Oscillator
V+ 0.1F RSET 10k
1 2 3
VCONTROL 0V TO 1.13V
+ -
V+ OUT LTC1799 GND SET DIV
1799 F04
5
4
N=1
OSC 10MHz * 10k * 1 - VCONTROL N RSET 1.13V
(
)
Figure 4. Voltage Controlled Oscillator
7
LTC1799
APPLICATIO S I FOR ATIO
POWER SUPPLY REJECTION Low Frequency Supply Rejection (Voltage Coefficient) Figure 5 shows the output frequency sensitivity to power supply voltage at several different temperatures. The LTC1799 has a conservative guaranteed voltage coefficient of 0.1%/V but, as Figure 5 shows, the typical supply sensitivity is lower.
0.15 RSET = 31.6k PIN 4 = FLOATING (/10)
FREQUENCY DEVIATION (%)
0.10 25C 0.05 -40C 85C
0
-0.05 2.5 3.0 3.5 4.0 4.5 SUPPLY VOLTAGE (V) 5.0 5.5
1799 F05
Figure 5. Supply Sensitivity
FREQUENCY ERROR (%)
High Frequency Power Supply Rejection The accuracy of the LTC1799 may be affected when its power supply generates significant noise with frequency contents in the vicinity of the programmed value of fOSC. If a switching power supply is used to power up the LTC1799, and if the ripple of the power supply is more than a few tens of millivolts, make sure the switching frequency and its harmonics are not related to the output frequency of the LTC1799. Otherwise, the oscillator may show an additional 0.1% to 0.2% of frequency error. If the LTC1799 is powered by a switching regulator and the switching frequency or its harmonics coincide with the output frequency of the LTC1799, the jitter of the oscillator output may be affected. This phenomenon will become noticeable if the switching regulator exhibits ripples beyond 30mV.
8
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START-UP TIME The start-up time and settling time to within 1% of the final value can be estimated by tSTART RSET(2.8s/k) + 20s. Note the start-up time depends on RSET and it is independent from the setting of the divider pin. For instance with RSET = 50k, the LTC1799 will settle with 1% of its 200kHz final value (N = 10) in approximately 160s. Figure 6 shows start-up times for various RSET resistors. Figure 7 shows an application where a second set resistor RSET2 is connected in parallel with set resistor RSET1 via switch S1. When switch S1 is open, the output frequency of the LTC1799 depends on the value of the resistor RSET1. When switch S1 is closed, the output frequency of the LTC1799 depends on the value of the parallel combination of RSET1 and RSET2. The start-up time and settling time of the LTC1799 with switch S1 open (or closed) is described by tSTART shown above. Once the LTC1799 starts and settles, and switch S1 closes (or opens), the LTC1799 will settle to its new output frequency within approximately 25s.
60 50 40 30 20 200k 10 0 -10 0 400 300 500 100 200 TIME AFTER POWER APPLIED (s) 600
1799 F06
W
UU
TA = 25C V + = 5V
10k 31.6k
Figure 6. Start-Up Time
3V OR 5V S1 RSET1 RSET2 1 2 3 SET DIV V+ GND 4 /100 /10 /1
1799 F07
OUT
5 V+
fOSC = 10MHz * OR fOSC = 10MHz *
LTC1799
( (
10k N * RSET1
)
10k N * RSET1//RSET2
)
Figure 7
LTC1799
APPLICATIO S I FOR ATIO
Jitter The typical jitter is listed in the Electrical Characteristics and shown in the Typical Performance Characteristics. These specifications assume that the capacitance on SET
TYPICAL APPLICATIO S
Low Power 80Hz to 8kHz Sine Wave Generator (IQ < 4mA)
3V 1 C1 0.1F RSET 2 3 V+ OUT LTC1799 GND SET DIV 5 3V 3V, N = 100 SW1 OPEN, N = 10 4 74HC4520 1 3V 2 16 C2 0.1F 10 7 8 800Hz fSINE 8kHz, N = 10 80Hz fSINE 800Hz, N = 100 9 15 CLOCK A ENABLE A VDD ENABLE B RESET A VSS CLOCK B RESET B Q1A Q2A Q3A Q4A Q1B Q2B Q3B Q4B 3 4 5 6 /2 /4 /8 /16 R11 100k 3V C3 0.1F R61 10k R51 5.11k R31 51.1k LTC1067-50 1 2 3 4 5 6 7 R21 20k 8 V+ NC V+ SA LPA BPA CLK AGND V- SB LPB BPB 16 15 14 13 12 11 10 9 R22 20k R62 14k R52 5.11k R32 51.1k fOSC
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(Pin 3) is limited to less than 10pF, as suggested in the Pin Functions description. If this requirement is not met, the jitter will increase. For more information, contact Linear Technology Applications group.
C4 1F SINEWAVE OUT fSINE = 10MHz * 10k N 64RSET 11 /32 12 /64 13 /128 14 /256 fOSC 64 HPA/NA HPB/NB INV A INV B RH1 249k RL1 51.1k
1799 TA05
W
U
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CLOCK-TUNABLE LOWPASS FILTER WITH A STOPBAND NOTCH AT THE 3rd HARMONIC fOSC *3 64
(
)
9
LTC1799
TYPICAL APPLICATIO S
3V Digitally Controlled Oscillator with 5kHz to 85kHz Range (N = 100, Pin 4 = V +)
3V LTC1659 CLK DIN CS/LD 1 2 3 4 CLK DIN CS/LD DOUT VCC VOUT REF GND 8 7 6 5 R5 10k R6 10k 10 3 4 1 C2 0.1F C3 0.1F 3V
3V R1 10k R2 10k
+
1/4 LT1491 8
9
-
R4 10k
R3 10k
NOTES: 1. FOR N = 10 (PIN 4 OPEN) THE RANGE IS 50kHz TO 850kHz 2. FOR N = 1 (PIN 4 = GND) THE RANGE IS 500kHz TO 8.5MHz 3. DRIVING PIN 4 OF THE LTC1799 WITH A 3-STATE LOGIC DEVICE GIVES A RANGE OF 5kHz TO 8.5MHz
fOUT (kHz)
10
U
+ -
1/4 LT1491 2 11
R8 10k R7 10k 5 RS 10k 3V 1 C1 0.1F 2 3 V+ OUT LTC1799 GND SET DIV 4 5
5kHz TO 85kHz
OUT fOSC = 100kHz * 3V C 4096
7
+
1/4 LT1491
1799 TA06
-
6
I=
(V + - VSET) C * 10k 4096
C: DAC CODE 200 C 3480
Input Code vs Output Frequency (N = 100, Pin 4 = V +)
100
75
50
25
0 0 1024 2048 DAC CODE 3072 4096
1799 TA07
LTC1799
PACKAGE DESCRIPTIO U
S5 Package 5-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1633) (Reference LTC DWG # 05-08-1635)
2.80 - 3.10 (.110 - .118) (NOTE 3) SOT-23 (Original) .90 - 1.45 (.035 - .057) .00 - .15 (.00 - .006) .90 - 1.30 (.035 - .051) .35 - .55 (.014 - .021) SOT-23 (ThinSOT) 1.00 MAX (.039 MAX) .01 - .10 (.0004 - .004) .80 - .90 (.031 - .035) .30 - .50 REF (.012 - .019 REF) PIN ONE .95 (.037) REF .25 - .50 (.010 - .020) (5PLCS, NOTE 2) 2.60 - 3.00 (.102 - .118) 1.50 - 1.75 (.059 - .069) (NOTE 3) A A2 .09 - .20 (.004 - .008) (NOTE 2) 1.90 (.074) REF A1
S5 SOT-23 0401
A A1 A2 L
.20 (.008) DATUM `A'
L NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES)
3. DRAWING NOT TO SCALE 4. DIMENSIONS ARE INCLUSIVE OF PLATING 5. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 6. MOLD FLASH SHALL NOT EXCEED .254mm 7. PACKAGE EIAJ REFERENCE IS: SC-74A (EIAJ) FOR ORIGINAL JEDEL MO-193 FOR THIN
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC1799
TYPICAL APPLICATIO S
Shutting Down the LTC1799
5V 74AC04 ON/SHDN R1 10k C1 0.1F 1 2 3 V+ OUT LTC1799 GND SET DIV
1799 TA08
Temperature-to-Frequency Converter
1400
5V RT 100k THERMISTOR C1 0.1F
1 2 3
OUT V+ LTC1799 GND SET DIV
5
FREQUENCY (kHz)
4
1799 TA03
RT: YSI 44011 800 765-4974
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
U
5
OUT
4
Output Frequency vs Temperature
MAX TYP MIN
fOSC = 10MHz * 10k RT 10
1200 1000 800 600 400 200 0
-20 -10 0 10 20 30 40 50 60 70 80 90 TEMPERATURE (C)
1799 TA04
1799f LT/TP 0801 2K * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001

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